diff --git a/src/instruction.rs b/src/instruction.rs index 6a4502c..36c815e 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -5,6 +5,8 @@ pub enum Instruction { Call (u8, u8, u8), Closure (u8, u32), + EqI (u8, i8, bool), + // Equals Constant? EqK (u8, u8, bool), @@ -47,6 +49,10 @@ pub enum Instruction { // MetaMethod, Binary MmBin (u8, u8, u8), + MmBinK (u8, u8, u8, bool), + + ModK (u8, u8, u8), + Move (u8, u8), Mul (u8, u8, u8), diff --git a/src/loader.rs b/src/loader.rs index 3d53bde..108e6c4 100644 --- a/src/loader.rs +++ b/src/loader.rs @@ -49,6 +49,7 @@ pub fn parse_inst (buf: [u8; 4]) -> Option let a = (buf [0] >> 7) | ((buf [1] & 0x7f) << 1); let b = buf [2]; + let sb = i8::try_from (b).ok ()? - 127; let ax = a as u32 + ((b as u32) << 8); let c = buf [3]; let bx = @@ -76,11 +77,14 @@ pub fn parse_inst (buf: [u8; 4]) -> Option 0x11 => Inst::SetI (a, b, c, k), 0x12 => Inst::SetField (a, b, c, k), 0x13 => Inst::NewTable (a), + 0x19 => Inst::ModK (a, b, c), 0x22 => Inst::Add (a, b, c), 0x24 => Inst::Mul (a, b, c), 0x2e => Inst::MmBin (a, b, c), + 0x30 => Inst::MmBinK (a, b, c, k), 0x33 => Inst::Not (a, b), 0x3c => Inst::EqK (a, b, k), + 0x3d => Inst::EqI (a, sb, k), 0x38 => Inst::Jmp (s_j), 0x42 => Inst::Test (a, k), 0x44 => Inst::Call (a, b, c), diff --git a/src/state.rs b/src/state.rs index ad234ac..6e3f3c7 100644 --- a/src/state.rs +++ b/src/state.rs @@ -201,6 +201,12 @@ impl State { upvalues: vec! [], }.into ()); }, + Instruction::EqI (a, sb, k_flag) => { + if (self.reg (*a).as_int ().unwrap () == *sb as i64) != *k_flag + { + next_pc += 1; + } + }, Instruction::EqK (a, b, k_flag) => { let b = usize::from (*b); @@ -337,6 +343,15 @@ impl State { panic! ("Not sure how to implememtn OP_MMBIN for these 2 values {a:?}, {b:?}"); } }, + Instruction::MmBinK (_a, _b, _c, _k) => { + // Ignore + }, + Instruction::ModK (a, b, c) => { + let b = self.reg (*b).as_int().unwrap (); + let c = k [usize::from (*c)].as_int ().unwrap (); + + *self.reg_mut (*a) = (b % c).into (); + }, Instruction::Move (a, b) => { *self.reg_mut (*a) = self.reg (*b).clone (); }, diff --git a/test_vectors/fizz_buzz.lua b/test_vectors/fizz_buzz.lua index 2ec0f58..55d81de 100644 --- a/test_vectors/fizz_buzz.lua +++ b/test_vectors/fizz_buzz.lua @@ -1,3 +1,11 @@ for i = 1, 50 do - print (i) + if i % 3 == 0 and i % 5 == 0 then + print ("FizzBuzz") + elseif i % 3 == 0 then + print ("Fizz") + elseif i % 5 == 0 then + print ("Buzz") + else + print (i) + end end